RS-232 Electrical

Now that we've got the RS-232 wires straight (see the last article) it's time to talk about how they're used; specifically, the electrical characteristics of RS-232.

When we talk about the electrical charactersitics, we are not talking about the asynchronous serial protocol that defines the start bit, number of data bits, parity bit, and stop bit, nor are we talking about the ASCII alphabet that defined the characters of a serial data stream — we are speaking just of the voltages on the wires in the RS-232 serial connection.

RS-232 signals are indicated by voltage differences with respect to a ground signal, and by specification can vary between +3 to +15 volts and -3 to -15 volts. At the same time, serial receivers must be undamaged by voltages up to ±25 volts. The region from +3 volts to -3 volts is a transition zone between signals.

The control lines in an RS-232 link use a “positive” logic to indicate their state. That is, a positive voltage on a wire carrying a control signal (any of DCD, DTR, DSR, RTS, CTS, and RI on a nine-wire serial connection) indicates that the control signal involved can be described as “On,” “Asserted,” or “True.” A negative voltage on a control line indicates that the control signal involved can be described as “Off,” “De-asserted,” or “False.”

The data lines are just the opposite. They use a so-called “negative” logic, meaning that a negative voltage on the wire carrying the data signal (RD or TD) is described as “On,” “Asserted,” or “True,” and that a positive voltage on the wire is interpreted as “Off,” “Deasserted,” or “False.”

[picture: "mark" and "space" waveform diagram]

RS-232 also defines the timing of electrical signalling. An RS-232 link differentiates between the bits of a serial data stream by collecting information about the voltage of its data lines. In the simplest terms, it does this by monitoring the lines for a start bit (described in our discussion of UARTs), and then reading the state of the line at predefined intervals, with each interval representing the next bit in the stream of data. The timing of these intervals is determined by the data rate of the link. This process in effect makes the serial connection follow a clock within each byte, although the timing between one byte of data and the next is not dictated by a clock.

Changes in signal state between positive and negative must happen within a specified period of time, and meet requirements governing their passage through the transition period, among other things.

[picture: transition diagrams]

The number of readings taken within a byte is determined by the settings used by the UART for composing serial data: the number of data bits set for the link, whether the connection has a parity bit, and the configuration of stop bits. Once the stop bit is read, the connection waits for the next start bit to arrive.